Routing Congestion in VLSI Circuits: Estimation and Optimization

Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar

Routing Congestion in VLSI Circuits: Estimation and Optimization - New York Springer US 2007 - Integrated Circuits and Systems .

978-0-387-48550-8


Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Communications Engineering, Networks

© For any Suggestions or Query, please contact the library staff @ librarian@pes.edu or Phone: +9180 2672 1983/ 2108.