Design Of Optimized Reversible Binary And Bcd Adders
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TextLanguage: English Publication details: 2015Subject(s): DDC classification: - CPEC15-1062
| Item type | Current library | Collection | Call number | Status | Barcode | |
|---|---|---|---|---|---|---|
| Institutional repository | Central Library Central Library | EC | CPEC15-1062 (Browse shelf(Opens below)) | Available | IR1062 |
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Design Of Optimized Reversible Binary And Bcd Adders A N Nagamani1, Ashwin S2, Vinod Kumar Agrawal3 1,2 Department of Electronics and Communication Engineering, PES Institute of Technology, Bangalore, INDIA 3Director CORI, Professor , Department of Information Science and engineering, PES Institute of Technology, Bangalore, INDIA Email id: nagamani@pes.edu1, ashwinsmnth@gmail.com2 , vk.agrawal@pes.edu3 International Conference on Conference - VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), pp. 1-5, Publisher IEEE, August 2015
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