TY  - BOOK
AU  - Sanjeevannanavar, S.  Nagamani, A N.
TI  - Efficient design and FPGA implementation of JPEG encoder using verilog HDL
U1  - CPEC11-601 
PY  - 2011///
KW  - Efficient,FPGA,JPEG,encoder,using,verilog,HDL
ER  -