01208nam a2200145Ia 4500 231221s9999 xx 000 0 und d English CPEC19-1946 Akshatha V Murthy. B Rajeshwari. SOC for Image Processing Using SIFT Accelerator 2019 Document Embedding Generation for Cyber-Aggressive Comment Detection using Supervised Machine Learning Approach Shylaja, S S. Abhishek Narayanan. Abhijith Venugopal. Abhishek Prasad. In this paper, we have implemented System on Chip (SoC) for SIFT algorithm by integrating designed and library IPs. In this algorithm, we have verified for feature transforms like rotation, intensity increase and decrease. The key points are detected for the given image and compared with that of transformed images. The key point matching achieved is up to 99.8%. It is also verified that Scale Invariant Feature Transform (SIFT) algorithm works for any image format. The algorithm is implemented in Xilinx model composer and then it is converted to Xilinx system generator block for Field Programable Gate Arrays (FPGA) implementation. FPGA used is Zynq-7000 xc7z020clg484-1. IR 236667 236667 2024-01-26 00:00:00 0 CPEC19-1946 IR1946 https://ieeexplore.ieee.org/document/9030311 2024-01-26 IR 0 0 0 CL 0 ML ML CL 0000-00-00 EC RS 1 0