01384nam a2200157Ia 4500008004100000041001200041082001600053100003700069245005200106260000900158500018700167510068200354942000701036999001901043952016401062231221s9999    xx            000 0 und d  aEnglish  aCPEC19-1946  aAkshatha V Murthy. B Rajeshwari. 0aSOC for Image Processing Using SIFT Accelerator  c2019  aDocument Embedding Generation for Cyber-Aggressive Comment Detection using Supervised Machine Learning Approach Shylaja, S S. Abhishek Narayanan. Abhijith Venugopal. Abhishek Prasad.  aIn this paper, we have implemented System on Chip (SoC) for SIFT algorithm by integrating designed and library IPs. In this algorithm, we have verified for feature transforms like rotation, intensity increase and decrease. The key points are detected for the given image and compared with that of transformed images. The key point matching achieved is up to 99.8%. It is also verified that Scale Invariant Feature Transform (SIFT) algorithm works for any image format. The algorithm is implemented in Xilinx model composer and then it is converted to Xilinx system generator block for Field Programable Gate Arrays (FPGA) implementation. FPGA used is Zynq-7000 xc7z020clg484-1.  cIR  c236667d236667  r2024-01-26 00:00:00l0oCPEC19-1946pIR1946uhttps://ieeexplore.ieee.org/document/9030311w2024-01-26yIR1040708CL00aMLbMLcCLd0000-00-00EECGRSF1V0