| 000 | 00632nam a2200157Ia 4500 | ||
|---|---|---|---|
| 008 | 231221s9999 xx 000 0 und d | ||
| 020 | _a978-3-540-95948-9 | ||
| 041 | _aEnglish | ||
| 100 | _aLars Svensson, José Monteiro | ||
| 245 | 0 | _aIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation | |
| 260 |
_c2009 _bSpringer US _aNew York |
||
| 440 | _aLecture Notes in Computer Science | ||
| 650 | _aComputer Science | ||
| 650 | _aLogic Design; Processor Architectures; System Performance and Evaluation; Arithmetic and Logic Structures; Memory Structures; Circuits and Systems | ||
| 942 | _cEB | ||
| 999 |
_c222806 _d222806 |
||