000 00538nam a2200133Ia 4500
008 231221s9999 xx 000 0 und d
020 _a978-0-387-25556-9
041 _aEnglish
100 _aJanick Bergeron, Eduard Cerny, Alan Hunter, Andrew Nightingale
245 0 _aVerification Methodology Manual for SystemVerilog
260 _c2006
_bSpringer US
_aNew York
650 _aCircuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Electronics and Microelectronics, Instrumentation; Electrical Engineering
942 _cEB
999 _c225524
_d225524