| 000 | 01341nam a2200121Ia 4500 | ||
|---|---|---|---|
| 008 | 231221s9999 xx 000 0 und d | ||
| 041 | _aEnglish | ||
| 100 | _aAshmitha, M. | ||
| 245 | 0 |
_aDesign and Implementation of Routing Algorithms for Network-on-Chip _bVanishree, P. |
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| 260 |
_c2018-2019 _bPES University _aBengaluru |
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| 510 | _aNetwork-on-Chip (NoC) is a new emerging technology used to create the interconnections within a System-on-Chip (SoC) architecture. The routing algorithm plays a key factor in the NoC design. The router routes the packets in the network based on the routing algorithm chosen. As the complexity of the design increases, the probability of malfunctions and failures in the network components also increases. Therefore, the NoC design must be able to tolerate faults in the network. Implementing fault tolerant routing technique in NoC is one of the solution for avoiding faults. Fault tolerant routing takes care of the faults in the network and provides an alternate routing path for the packets to traverse in the network. In this project, four different types of routing algorithms are implemented i.e. X-Y, West-First, North-Last and Odd-Even routing. A fault tolerant algorithm that can handle multiple link faults in NoC has been explained and is implemented for the four routing algorit | ||
| 942 | _cCD | ||
| 999 |
_c237085 _d237085 |
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